1. Field of the Invention
The invention relates to a sampling timing phase error detector for detecting a timing phase error of sampling from a discrete time signal sequence obtained by sampling a multivalue VSB (vestigial sideband: residual sideband) modulation signal.
2. Description of Related Art
A multivalue VSB modulation is known as a modulation method for digitally transmitting information data such as video signal and audio signal.
For example, in a 16-value VSB modulation, coding information data (for instance, error correction coded data) to be transmitted is first converted into a real number value symbol sequence {a.sub.k } every four bits. Arbitrary one symbol of the real number value symbol sequence has any one of 16 kinds of real number values. One among the 16 values used is determined by a combination of the 4-bit data.
The real number value symbol sequence {a.sub.k } is converted to a 16-value VSB modulation signal r(t) by processes which are expressed by the following equations. ##EQU1## where j: imaginary number unit
a.sub.k : transmission symbol sequence PA1 y(t): transmission VSB pulse PA1 g(t): base band VSB modulation signal PA1 T: transmission symbol period PA1 fs: transmission symbol frequency PA1 real[ ]: real part of complex signal in parentheses PA1 fc: carrier frequency
A Fourier transform of the transmission pulse y(t) has VSB characteristics as shown in FIG. 1A or 1B. A timing clock synchronized with the transmission symbol frequency (fs=1/T) is time-division multiplexed to the 16-value VSB modulation signal.
The 16-value VSB modulation signal is transmitted to the receiver side through a transmission media.
FIG. 2 is a diagram showing a construction of a 16-value VSB demodulator for demodulating the 16-value VSB modulation signal transmitted through the transmission media.
In FIG. 2, a tuner 1 receives the 16-value VSB modulation signal and converts the 16-value VSB modulation signal into an IF (intermediate frequency) signal while adjusting its local oscillating frequency in accordance with a phase error signal which is supplied from a phase error detecting circuit 3, which will be explained later. The tuner 1 also adjusts a gain of the IF signal in accordance with an AGC signal which is supplied from an AGC (automatic gain control) 2, which will be explained later.
A Nyquist filter 4 shapes a pulse of the IF signal so that overall characteristics with the transmission VSB pulse y(t) become Nyquist characteristics and supplies the pulse shaped signal to a quadrature detector 5. The quadrature detector 5 complex frequency converts the IF signal which was waveform shaped by the Nyquist filter 4, thereby obtaining a complex base band signal. In the diagram, i and j denote a real part and an imaginary part of the complex base band signal, respectively. The phase error detecting circuit 3 presumes a phase angle of a multiplexed pilot from the complex base band signal and negatively feeds back an error between the presumed phase angle and a predetermined phase angle to a VCO in the tuner, thereby allowing a detecting operation without a phase error to be executed. An LPF (low pass filter) 6 supplies a signal obtained by removing unnecessary frequency components such as image spectrum and the like occurring in the detecting step from a real part signal in the complex base band signal to each of the AGC 2, an A/D converter 7, and a timing recovery circuit 8. The AGC 2 generates an AGC signal to adjust a level of a signal supplied from the LPF 6 to a predetermined level and feeds back and supplies the AGC signal to the tuner 1.
The timing recovery circuit 8 extracts a timing clock signal synchronized with the transmission symbol frequency (fs=1/T) from the signal supplied from the LPF 6 and supplies a sampling clock signal which is phase synchronized with the timing clock signal to the A/D converter 7.
The A/D converter 7 samples the signal which is supplied from the LPF 6 every sampling clock signal, thereby obtaining a digital received discrete time signal sequence. An equalizer 9 performs an equalizing process to the received discrete signal sequence, thereby outputting a received discrete time signal sequence in which an interference occurring in a transmission path, a distortion occurring in the apparatus, and the like are eliminated. A symbol value discriminating circuit 10 discriminates whether the received discrete time signal sequence which was subjected to the equalizing process corresponds to any one of the symbol values among 16 values and generates coding information data corresponding to the symbol value. By error correction processing the coding information data by an error correcting circuit (not shown), transmitted information data can be obtained.
As mentioned above, in the 16-value VSB demodulation, the timing clock signal synchronized with the transmission symbol frequency (fs=1/T) is extracted from the transmitted 16-value VSB modulation signal. A digital demodulating process is performed at a timing which is phase synchronized with the extracted timing clock signal.
In the transmission system mentioned above, not only the information data to be transmitted but also the timing clock signal synchronized with the transmission symbol frequency must be multiplexed and transmitted, so that there arises a problem that it becomes an obstacle for realization of a high speed transmission.